发明名称 |
IMAGE FORMING APPARATUS |
摘要 |
Data from a drawing engine main part (101) is sent to a FIFO (First In First Out) memory (102), temporarily stored there and sent to a high speed cache memory (104) through an arithmetic unit (103). Data are transmitted between this cache memory (104) and a frame buffer (105). A cache controller (106) prefetches the contents of the FIFO memory (102) and controls the cache memory (104) so that all the data of the same page which is stored inside the frame buffer (105) and to which high speed access can be made can be read and written. In this way, high speed access can be made and the drawing speed can be improved though an economical frame buffer is used.
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申请公布号 |
WO9729456(A1) |
申请公布日期 |
1997.08.14 |
申请号 |
WO1997JP00296 |
申请日期 |
1997.02.06 |
申请人 |
SONY COMPUTER ENTERTAINMENT INC.;HIROI, TOSHIYUKI;OKA, MASAAKI |
发明人 |
HIROI, TOSHIYUKI;OKA, MASAAKI |
分类号 |
G06F12/00;G06F3/153;G06F12/08;G06T1/20;G06T1/60;G06T11/00;G09G5/393;(IPC1-7):G06T1/00;G09G5/36 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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