发明名称 MULTILAYER INTERCONNECTION BOARD AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To contrive the reliable connection and easy connection of via holes and the enhancement of the yield of the formation of the via holes and the like. SOLUTION: This hoard is constituted into a structure, wherein circuit patterns and insulating layers are laminated in order on the surface of a core board and at the same time, the circuit patterns holding each insulating layer between them are connected with each other through each via hole. In this case, the board is formed into a structure, wherein the first via hole 11 to the third via hole 13 are formed into the shape of a straight line in the laminating direction and each cap-shaped land pattern 14 or 15 is made to interpose between the via holes to connect the via holes 11 and 13 with each other.
申请公布号 JPH09199854(A) 申请公布日期 1997.07.31
申请号 JP19960009005 申请日期 1996.01.23
申请人 NEC CORP 发明人 YOSHIKAWA TAKEO
分类号 H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/46
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