| 摘要 |
PURPOSE:To stabilize the operations of a system by stopping the operations of the system when a CPU runs away, and holding this state. CONSTITUTION:When a CPU 1 executes normal operations, pulse signals in a prescribed cycle are supplied to a pulse cycle decision circuit 2. As the result, since signals at an L level are outputted from an abnormality generation storage circuit 3, an AND circuit 4 is turned to an opened state and control signals are supplied through the AND circuit 4 to a final output circuit 6. When the CPU 1 runs away, however, pulse signals in a certain cycle longer than the prescribed cycle are supplied to the pulse cycle decision circuit 2 or no pulse signal is supplied. As the result, the output of the abnormality generation storage circuit 3 is inverted to an H level and after that, this state is held. Therefore, the AND circuit 4 is turned to a closed state and control signals Y are cut off. |
