| 摘要 |
PROBLEM TO BE SOLVED: To increase the scale and speed of a semiconductor memory by providing a memory array and a pullup means which is disposed corresponding to a data line to increase driving capacity thereof selectively and temporarily at first in the operation of selecting word lines. SOLUTION: A pair of CMOS inverters comprising a P-channel MOSFET5 and an N-channel MOSFETN1 or a P-channel MOSFETN6 and an N-channel MOSFETN2 is cross-linked mutually at the intersection of a word line and a complementary data line. Static type memory cells MC of 512×1,152 in substance are arranged in a lattice state. Non-inversion and inversion input/output nodes composing substantially 512 pieces of memory cells MC arranged in the same row of a memory array MARY are connected in common respectively to a non-inversion signal line and to an inversion signal line of the corresponding complementary data line through a pair of selective MOSFETN3 and N4 of an N-channel type.
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