发明名称 Mixed mode output buffer circuit for CMOSIC
摘要 This invention provides circuits which provide stable internally derived voltages for mixed mode large scale integrated circuits having SRAM, DRAM, and the like. The circuits use a summation of threshold voltages of metal oxide semiconductor field effect transistors to clamp voltages and a level detection circuit to compensate for variation in the primary supply voltage. A load detection and feedback circuit using a parasitic bipolar transistor provides voltage stability over a wide range of loading conditions.
申请公布号 US5633604(A) 申请公布日期 1997.05.27
申请号 US19960663437 申请日期 1996.06.13
申请人 ETRON TECHNOLOGY, INC. 发明人 TING, TAH-KANG J.
分类号 H03K19/003;(IPC1-7):H03K19/094;H03K19/082 主分类号 H03K19/003
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