SEMICONDUCTOR MEMORY DEVICE AND ITS PREPARATION

摘要

PROBLEM TO BE SOLVED: To eliminate the limitation of the number of times for writing/erasing data by charging a floating electrode, and providing a switching element which makes the floating gate electrode discharge the charged electric charge. SOLUTION: A multilayer transistors M1, 1-Mn, n of a memory cell (for data memory) containing floating gates F and G and control gates C and G are arrayed in multiple numbers in matrix. pass-transistors Q1, 1-Q1, n wherein switching is so performed that the floating gates F and G of the multilayer transistors M1, 1-Mn, n of each data memory are charged with electric charge and the charged electric charge is discharged for writing/erasing a cell are configured so that a pair is established with the lamination type transistors M1, 1-M, n for the data memory. Thus, since no electron capture occurs in a gate insulation film, they are used as DRAMs with no limitation to writing or erasing of data.