发明名称 Junction-isoliertes, hochspannungsintegriertes MOS-Bauelement
摘要 An integrated device comprising isolating regions (18) of a first type of conductivity, each surrounding an epitaxial pocket (8) of an opposite type of conductivity, housing drain and source regions, and covered with an oxide layer (22a, 22b) housing gate regions (7) and over which extend the source (31), drain and gate connections. For linearizing potential distribution at the epitaxial pocket (8)- isolating region (18) junction and close to the source regions beneath the connections (31), these regions are provided with a double chain of condensers (11, 12) embedded in the oxide layer (22a, 22b) and the terminal elements (12a, 11a) and the intermediate element (11b) of which are biased to predetermined potentials (VG, ground, VD). <IMAGE>
申请公布号 DE69215858(T2) 申请公布日期 1997.05.15
申请号 DE1992615858T 申请日期 1992.04.17
申请人 SGS-THOMSON MICROELECTRONICS S.R.L., AGRATE BRIANZA, MAILAND/MILANO, IT 发明人 RAVANELLI, ENRICO MARIA ALFONS, I-20052 MONZA, IT;VILLA, FLAVIO, I-20159 MILANO, IT
分类号 H01L29/06;H01L29/40;H01L29/78 主分类号 H01L29/06
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