| 摘要 |
<p>PROBLEM TO BE SOLVED: To shorten the time of precharge operation and read operation by precharging each bit line at the time of rising a power supply, storing a data and normal read operation. SOLUTION: Immediately after the rise of power supply, a bit line precharge circuit 7 is scanned through a column selector 3. Consequently, all bit lines are controlled to be precharged through a ring oscillator 9, a frequency divider 10, a 5 bit up-counter 11 and a power-on precharge detection circuit 13. Bit lines corresponding to all other columns are also precharged during an interval when a column corresponding to some address is selected by the column selector 3 to be accessed. Furthermore, all bit lines are precharged by a peripheral column selector 4 and a peripheral precharge circuit 14 when the memory is in data storing state.</p> |
