发明名称 LOGIC ANALYZER
摘要 PROBLEM TO BE SOLVED: To obtain a logic analyzer in which trigger conditions can be set including the history of variation of the signal to be measured, e.g. the number of times when specified conditions are satisfied. SOLUTION: An operator sets pretrigger conditions combining AND conditions and OR conditions, and the number of times to be matched with the pretrigger conditions at a trigger condition setting section 15. A programmable logic array 16 comprises a sequential logic circuit, e.g. a flip-flop circuit, as well as an AND circuit and an OR circuit and the interconnection can be set and modified electrically and arbitrarily. The trigger condition setting section 15 forms a logic circuit outputting a trigger signal 17 by modifying the interconnection in programmable logic array 16 when the trigger conditions being set by the operator are satisfied. Since a circuit element, e.g. a flip-flop circuit, can store the state, intricate trigger conditions including the history of variation of the signal to be measured can be set.
申请公布号 JPH0980079(A) 申请公布日期 1997.03.28
申请号 JP19950235033 申请日期 1995.09.13
申请人 NEC CORP 发明人 FUKUNAGA MASAYUKI
分类号 G01R13/20;G01R13/28;G01R13/32;G06F11/22;G06F11/28 主分类号 G01R13/20
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