发明名称 METHOD AND SYSTEM OF DESIGNING CURRENT CELL CIRCUIT AND CURRENT CELL CIRCUIT AND DIGITAL/DIGITAL CONVERTER AND ANALOG/DIGITAL CONVERTER
摘要 PROBLEM TO BE SOLVED: To improve accuracy by a method wherein an error is distributed temporarily while keeping the target accuracy of the whole in an error factor, the determination of the value of gate width W and the value of gate length L is repeated so as to reduce distributed values and a function using the distributed values as parameters is obtained when threshold voltage, gate width W and gate length L are dispersed. SOLUTION: Each requirement constant is prepared at a step S314, and an error distribution KVth is determined at a step S302. The maximum value of an aspect ratio is obtained at a step S303. On the other hand, an error distribution Kβis acquired at a step S304, an error KL toΔL is distributed temporarily at a step S305, W and L are obtained and KL is updated, and the graphs of W and L using KL as a parameter are prepared at a step S308. W and L are inscribed in consideration of Ar-max at a step S309 from outputs from the steps S303 and S308, a minimum gate area W×L is acquired and KVth is updated. The operation is repeated, the graph of an area using the error distribution as the parameter is prepared, and the gate area W×L is minimized.
申请公布号 JPH0982959(A) 申请公布日期 1997.03.28
申请号 JP19950239515 申请日期 1995.09.19
申请人 HITACHI LTD 发明人 OTSUKA MASANORI;ICHIKI SHUZO
分类号 H01L21/822;G06F17/50;H01L21/82;H01L27/04;H01L29/78;H03K19/173;(IPC1-7):H01L29/78 主分类号 H01L21/822
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