COLUMN REDUNDANCY DEVICE OF SEMICONDUCTOR MEMORY DEVICE

摘要

A column redundancy apparatus for a semiconductor memory device commonly uses an output signal of at least two programmable redundancy decoders in one line, connects a normal data to each memory cell array by using an output line and a spare data output line, selects the output paths of the nrmal data column and the spare data column by using a memory cell array block selection signal, and increases a redundancy effectiveness. The apparatus includes: a plurality of normal decoders(1); a plurality of redundancy decoders(2); a first switching means for switching a normal bit line; a second switching means for switching a spare bit line; a first logic signal generator(4A) composed of a plurality of logic elements; a third switching means for switching a spare bie line and a first data output line of the array block(3A); a fourth switching means for switching a normal bit line and a first data output line of the array block(3A); a second logic signal genherator(4B); a fifth switching means for switching a spare bie line and a second data output line of the cell array(3B); and a sixth switching means for switching a normal bit line and a second data output line of the cell array(3B).