发明名称 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To improve reliability and yield of a DRAM cell of a SOI structure caused by a layer and a joint generated in a polysilicon film by preventing dispersion in the thickness of the polysilicon film for each trench, formation abnormality in the polysilicon film and breakdown voltage deterioration of a capacitor insulation film. SOLUTION: After a process in which a trench type cell capacitor is formed on a substrate 11, a substrate 52 forming an oxide film 53 is joined to the top surface of the cell capacitor for forming an SOI structure. And the bottom part of a trench 13 is used as a surface electrically connected to a source area 64 or a drain area 65 of an MOS transistor. A polysilicon film 32 of the bottom of the trench is ground for exposure, and then a ground surface is detached to another substrate, thereby forming the SOI structure.
申请公布号 JPH0969612(A) 申请公布日期 1997.03.11
申请号 JP19950222851 申请日期 1995.08.31
申请人 TOSHIBA CORP 发明人 KOYAMA HARUHIKO;SAWADA SHIZUO
分类号 H01L27/108;H01L21/8242 主分类号 H01L27/108
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