发明名称 |
INSTRUCTION CANCEL DEVICE |
摘要 |
<p>PROBLEM TO BE SOLVED: To inhibit the execution of a processing even after an execution instruction is given by providing a function for invalidating the execution of only an instruction which becomes unnecessary during the execution instruction accumulated in a memory. SOLUTION: The execution instruction generated from a system control circuit 2 is sequentially accumulated in the FIFO memory 3 by a write control circuit 4. The execution instruction is read by a read control circuit 5 and is set in the respective circuits of a poststage. When a cancel signal from the system control circuit 2 is valid, the execution instruction is only read from the FIFO memory 3 and it is not set in anywhere.</p> |
申请公布号 |
JPH0962833(A) |
申请公布日期 |
1997.03.07 |
申请号 |
JP19950217797 |
申请日期 |
1995.08.25 |
申请人 |
SANYO ELECTRIC CO LTD |
发明人 |
HASEBE MASAHIKO;FURUKAWA RIICHI;HARADA SHIGEKI |
分类号 |
G06F9/38;G06F3/048;G06F3/14;G06T1/60;G09G5/34;(IPC1-7):G06T1/60 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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