SHARED MEMORY SYSTEM, PARALLEL PROCESSOR, AND MEMORY LSI

摘要

PROBLEM TO BE SOLVED: To reduce access contention by providing a means which performs the data write processing and the data read processing of memory cells of a memory unit or a memory LSI in parallel. SOLUTION: A shared memory 2006 has the two-port memory structure provided with individual ports for a read address RA as well as output data DO corresponding to RA and a write address MA as well as input data DI corresponding to MA. By such a constitution, the data write processing and the data read processing of memory cells in the memory unit can be performed in parallel. Consequently, the access contention which occurs on the memory unit by the cycle of read from the processor side to the memory unit (local shared memory 2006) and the cycle of write from the shared bus system side is reduced.