| 摘要 |
A FEC-DRAM of 3 elements/2 bits type having a stack capacitor of increased capacitance to ensure integration with an increased density. The stack capacitor is formed as embedded in a trench, and local wiring is provided to form an electric contact on an element isolation region. When required, the stack capacitor is made to extend onto a word line region. The stack capacitor is given an increased surface area and a greater capacitance, consequently reducing the area occupied and making it possible to provide DRAMs with a higher packing density.
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