发明名称 Galois field polynomial multiply/divide circuit and a digital signal processor incorporating same
摘要 The multiply/divide circuit uses an exclusive OR function of an ALU in a DSP. The result of the exclusive OR function through accumulators and shift registers which recycle the shifted signals back to the ALU, can be made to perform the multiply or divide function. When used in a DSP for telecommunication purposes, the multiply/divide circuit can perform convolution encoding and cyclic redundancy check, among other functions, specifically for the telecommunication application.
申请公布号 US5602767(A) 申请公布日期 1997.02.11
申请号 US19950521112 申请日期 1995.08.29
申请人 TCSI CORPORATION 发明人 FETTWEIS, GERHARD P.;TOURIGUIAN, MIHRAN
分类号 G06F7/60;G06F7/72;G06F11/10;H03M13/00;H03M13/03;H03M13/09;H03M13/15;(IPC1-7):G06F7/00;G06F15/00 主分类号 G06F7/60
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