| 摘要 |
<p>PROBLEM TO BE SOLVED: To normally restart loading even when the loading is interrupted. SOLUTION: When write signals S33a hold 'H' for more than first fixed time, a capacitor 45 is discharged and 'L' is outputted from a buffer 46. The write signals inputted to a delay circuit 42 are delayed for the fixed time. The signals of a point (b) and the point (d) are ANDed by an AND gate 47 and the write signals of the point (e) are not turend to 'H' for more than tBLC. In a binary counter 49, with the signals of the point (b) as clocks, the write signals are counted until the loading is performed for one sector. When the loading is restarted and the signals of the point (a) are changed to 'L', the signals of the point (d) are changed to 'H' and the signals of the point (e) are turned to 'H' only for the time of the delay circuit 42 and changed to 'L'. Thus, the loading is restared.</p> |
