发明名称 |
Signal processing channel with high data rate and low power consumption |
摘要 |
An apparatus and method for detecting analog signals representing patterns of n-bit RLL-encoded data read from a data storage device. R integrators each integrate the analog signal over successive time periods consisting of a preselected number n of bit cycles, where n>1, weighted by a preselected set of n orthogonal signals that are staircase functions which vary each bit cycle to provide R integrated weighted outputs. The R integrated weighted outputs are converted by a lookup table or read-only memory into an n-bit digital representation corresponding to a unique one of the n-bit analog data patterns.
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申请公布号 |
US5594436(A) |
申请公布日期 |
1997.01.14 |
申请号 |
US19940327062 |
申请日期 |
1994.10.21 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HASSNER, MARTIN A.;SCHWIEGELSHOHN, UWE;WINOGRAD, SHMUEL |
分类号 |
G11B20/10;G11B20/14;(IPC1-7):H03M7/00 |
主分类号 |
G11B20/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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