发明名称 |
Delay circuit for a write data precompensator system |
摘要 |
A write data precompensator system is described which comprises a delay element circuit (12) which receives a clock signal and outputs a delayed clock signal which includes a programmable selectable delay in the rising edge of the clock signal. The amount of delay is received using a delay voltage level generated by a delay level circuit (16) which receives delay magnitude control values in digital form. A reference level circuit (18) also generates a continuous level voltage level so that the delay element circuit (12) can instantly change between a delayed operation and an undelayed operation without waiting for the delay voltage level to adjust.
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申请公布号 |
US5594377(A) |
申请公布日期 |
1997.01.14 |
申请号 |
US19950528169 |
申请日期 |
1995.09.14 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
CHOI, DAVY H.;GIOLMA, WILLIAM H.;LEE, OWEN |
分类号 |
H03H17/00;H03K5/13;(IPC1-7):H03H11/26 |
主分类号 |
H03H17/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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