| 摘要 |
PURPOSE: To improve the detection ability of a synchronizing pattern in the state of suppressing the erroneous detection probability of the synchronizing pattern low by correcting corespondent data into the prescribed value of the synchronizing pattern while referring to a data error identification flag only when there is any error in the data of an input signal. CONSTITUTION: A data signal 12 inputted from an error correction processing circuit 11 to an input terminal 31 is inputted to a shift register 21 and outputted to a data correcting means 23. On the other hand, a data error identification flag 13 inputted from the error correction processing circuit 11 to an input terminal 32 is inputted to a shift register 22 and outputted to a data correcting means 23 and a counting means 28 later. The data correcting means 23 outputs data corrected into the data of a correspondent position among the prescribed data of the synchronizing pattern as corrected data 24 while referring to the data error identification flag held by the shift register 22 in the case of any data error in the respective data held by the shift register 21. |
