| 摘要 |
PURPOSE: To visually specify and recognize with ease an address of a specified cell among a number of unit cells. CONSTITUTION: This device is provided with 8 memory blocks 11 to 18 and a memory cell formation region 30 including four row decoder parts 21 to 24 provided at an interval of two memory blocks to be held therebetween. A peripheral circuit part 31 including a sense amplifier circuit, a bit line equalizing circuit, etc., is formed in a region adjacent to the memory cell formation region 30 in a row direction. An address monitor 33 is constituted of figures at a fixed interval in a row direction in a peripheral region excepting the memory cell formation region 30. The address monitor 33 is formed by using a polysilicon layer of a lowermost layer constituting a memory cell and is used for visually recognizing a row address of a memory cell. |
