发明名称 DIGITAL CONVERGENCE COMPENSATING APPARATUS
摘要 The circuit is provided for preventing the distortion by reading the correction data of a memory from CPU or by transmitting the adjusting data into memory, and includes a microprocessor controlling the whole system, a address generator, a PLL generating a reference clock, a read/write controller generating a timing signal and controlling a read/write operation, a memory storing and outputting the data from each address, a D/A converter, a lowpass filter filtering the high frequency signal from the data outputted by the D/A converter, an amplifier.
申请公布号 KR960016847(B1) 申请公布日期 1996.12.21
申请号 KR19940016337 申请日期 1994.07.07
申请人 LG ELECTRONICS CO.,LTD. 发明人 CHO, JIN-RYUL
分类号 H04N9/28;(IPC1-7):H04N9/28 主分类号 H04N9/28
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