| 摘要 |
A slip buffer includes a first-in-first-out memory, an input address generating means, an output address generating means, and a slip buffer control logic. The input address generating means generates addresses into which data is read into the first-in-first-out memory. The output address generating means generates addresses from which data is read from the first-in-first-out memory. The slip buffer control logic includes a first latch, a second latch and a slip address generation means. A first boundary address of a first frame boundary is stored in the first latch. The first latch includes a first validity bit which indicates whether the first boundary address is valid, A second boundary address of a second frame boundary is stored in the second latch. The second latch includes a second validity bit which indicates whether the second boundary address is valid. The slip address generation means loads a first new output address into the output address generating means when a current input address in the input address generating means is about to overtake a current output address in the output address generating means. The first new output address is a full frame ahead of the current output address in the output address generating means. The slip address generation means also loads a second new output address into the output address generating means when the current output address is about to overtake the current input address. The second new output address is a full frame behind the current output address in the output address generating means.
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