发明名称 |
HDLC DATA RAPIDING PROCESSING AND DATA MACHING DEVICE |
摘要 |
a high processor matching means(101) to communicate data with a high processor; a 20ms synchronizing signal matching/selecting and related signal generating means(108) generating a synchronizing reference clock, a watchdog alarm signal, a timer signal, a transmission synchronizing signal and audio processing transmission clock signal; a PCM matching means(106); a general processor and peripheral means(102); two single-chip processors and peripheral means(104,110); a HDLC processing means(111) receiving/transmitting HDLC data; two common memory means(103,109); an audio processing device matching means(112); and a reset, alarm and operating state displaying means(113) generating reset signal and alarm signal and displaying the operating state by LED.
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申请公布号 |
KR960014173(B1) |
申请公布日期 |
1996.10.14 |
申请号 |
KR19930016053 |
申请日期 |
1993.08.18 |
申请人 |
KOREA ELECTRONICS & TELECOMMUNICATION RESEARCH INSTITUTE |
发明人 |
RYU, DEUK-SOO;JANG, KIL-JOO;JANG, MOON-SOO;SHIN, DONG-JIN;LEE, CHOONG-KEUN |
分类号 |
G06F15/00;(IPC1-7):G06F15/00 |
主分类号 |
G06F15/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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