| 摘要 |
PURPOSE:To shorten the time required for phase matching by storing information of the phase difference detected by phase comparison between an output signal and an input signal in a buffer in each phase difference detection period and reading this information from the buffer in the following phase difference non-detection period to stop clocks in a certain proportion. CONSTITUTION:A phase difference signal whose one period consists of the phase difference detection period and the phase difference non-detection period is outputted by a phase comparing circuit 1 which detects the phase difference between the input signal and the output signal. A buffer 4 is provided, and phase difference information is stored in the phase difference detection period of the phase difference signal and is read out in the following phase difference non-detection period, and the stop of clocks of a clock generator 2 is controlled in a certain proportion based on this information. Phase difference information is expressed with the number of clocks. Thus, the play time on the control is eliminated to considerably quickly match the phases because the phase difference reduction control dependent upon the clock stop in the certain proportion is performed without being limited to the phase difference detection period like a conventional system. |
