发明名称 Apparatus and method for processing asynchronous transfer mode cells
摘要 Egress processing of asynchronous transfer mode (ATM) cells is performed by an egress processor (18) that receives ATM cells from an ingress processor (16) through a cell bus (20). ATM cells are received in the egress processor (18) through an egress FIFO buffer (32) and placed within available space in an ECELL memory (38) through a single cell FIFO buffer (34) as controlled by a cell loader (36). A linker (44) chains together ATM cells, no matter where they are located in the ECELL memory (38), corresponding to a particular call into a specific packet by placing pointer information within each ATM cell of a specific packet such that each ATM cell points to the next ATM cell within the packet. The linker (44) places the cell location of the first cell of the packet into a packet FIFO buffer (52) of a cell location buffer (48). An unlinker (46) uses the cell location within the packet FIFO buffer (52) to transmit ATM cells from the ECELL memory ( 38) to an egress line interface (22) according to the pointer information placed by the linker (44) into each ATM cell. When the unlinker (46) is ready to transmit ATM cells from the ECELL memory (38) before the linker (44) has finished chaining together a packet, the linker (44) places the cell location information directly into a cell FIFO buffer (50) within the cell location buffer (48) instead of within each ATM cell for immediate use by the unlinker (46).
申请公布号 US5495478(A) 申请公布日期 1996.02.27
申请号 US19940339301 申请日期 1994.11.14
申请人 DSC COMMUNICATIONS CORPORATION 发明人 WILKINSON, I. C. KEITH;PEARCE, JONATHAN R.
分类号 H04L12/56;H04Q11/04;(IPC1-7):H04L12/54 主分类号 H04L12/56
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