| 摘要 |
PURPOSE: To obtain a hybrid IC with a reduced volume and a reduced area by a method wherein a discrete circuit element is formed on at least one surface of a die-pad and a semiconductor chip is fixed to the upper surface of the circuit element or a semiconductor chip is directly fixed to the surface of the die-pad on which the discrete circuit element is not formed. CONSTITUTION: A semiconductor chip 2 is mounted on the die pad D of a lead frame. A discrete circuit element C is formed on at least one surface of the die pad D. Or, a semiconductor chip 2 is directly fixed to the surface of the die pad D on which the discrete circuit element C is not formed. For instance, a capacitance element C is formed on the surface of the die pad D on which the semiconductor chip 2 is not mounted and incorporated. For that purpose, an insulating layer 3 is formed first on the rear of the die pad D and a conductive layer 4 is formed on the surface of the layer 3, an insulating layer 5 is formed on the surface of the layer 4 and, further, a conductive layer 6 is formed on the surface of the layer 5. |
