| 发明名称 |
INTERLEAVED AND SEQUENTIAL COUNTER |
| 摘要 |
A counter system has a first counter (1) seeded by several input signals and a second counter (2) seeded by at least a first output from the first counter. A selection signal is input to the second counter to select the use of either an interleaved count sequence or a sequential count sequence.
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| 申请公布号 |
WO9621278(A1) |
申请公布日期 |
1996.07.11 |
| 申请号 |
WO1995US17051 |
申请日期 |
1995.12.29 |
| 申请人 |
HYUNDAI ELECTRONICS AMERICA, INC. |
发明人 |
OH, JONG-HOON |
| 分类号 |
G11C11/417;G11C7/10;G11C8/04;G11C11/407;G11C11/408;H03K23/00;H03K23/64;(IPC1-7):H03K21/00 |
主分类号 |
G11C11/417 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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