发明名称 High capacity run-length-limited coding system employing asymmetric and even-spaced codes
摘要 A system for encoding and decoding binary data in a data transmission system, such as a magnetic or optical data storage channel. The encoding process is implemented as a two-step RLL coding procedure wherein the original user bit data are first encoded as an asymmetric RLL code signal at a reduced clock rate and then translated to a second even-spaced RLL code signal suitable for recording to a data storage medium at a full-speed clock rate. The system also provides for recovering suitable even-spaced RLL codes recorded at a full-speed clock rate, translating the recovered even-spaced RLL code signal to an asymmetric RLL code signal at a reduced clock rate, and then decoding the asymmetric RLL code signal to recover the original user bit data. A preferred embodiment uses a rate 2/5 (2, 16, 2) even-spaced RLL code at a full-speed clock rate and a rate 4/5 (0,7; 1,8) asymmetric RLL code at a half-speed clock rate. The rate 4/5 asymmetric RLL code has a high capacity and the rate 2/5 even-spaced RLL code has a wide detection window. The intercode translation procedure requires only simple time-delay circuitry.
申请公布号 US5535187(A) 申请公布日期 1996.07.09
申请号 US19930167104 申请日期 1993.12.15
申请人 INTENATIONAL BUSINESS MACHINES CORPORATION 发明人 MELAS, CONSTANTIN M.;RUGAR, DANIEL;SUTARDJA, PANTAS;WOOD, ROGER W.
分类号 G06T9/00;G11B20/14;(IPC1-7):G11B5/09 主分类号 G06T9/00
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