发明名称 OUTPUT BUFFER TYPE ATM SWITCH
摘要 PROBLEM TO BE SOLVED: To process high speed data received/outputted to/from each input/ output line without increasing a speed of the switch through decentralized processing by which lots of input cells are sent simultaneously to each output line and through ease of module realization. SOLUTION: The switch is provided with a batcher sorting network(BSN) 401 that arranges N cells received simultaneously through an input line of the switch in the order of smaller to larger cells, an expanded Banyan routing network(EBRN) 402 that provides an output of the arranged cells from the BSN 401 to an output line group to which output lines belong, and an output queuing module 403 that temporarily stores cells outputted from the EBRN 402 to a buffer of a common memory and transmits them to an output terminal.
申请公布号 JPH08167909(A) 申请公布日期 1996.06.25
申请号 JP19950243472 申请日期 1995.09.21
申请人 ELECTRON & TELECOMMUN RES INST;KORIA TELECOMMUN OOSORITEI 发明人 YU GORU U;JIYON TE SUYU
分类号 H04Q3/00;H04L12/931;H04Q3/52 主分类号 H04Q3/00
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