发明名称 QAM SIGNAL CLOCK RECOVERY CIRCUIT
摘要 PURPOSE: To provide a QAM signal clock recovery circuit with ease of circuit integration in which stable clock recovery operation is attained at all times. CONSTITUTION: A QAM signal is sampled by a sampling circuit 11 and the result is given to an absolute value circuit 12. Its output is given to a demultiplexer circuit 13 and then code addition circuits 14, 15, an adder circuit 16 sums the signals and its output is fed to a VCO circuit 18 as a control signal. The output of the VCO circuit 18 is used for a sampling signal of the sampling circuit 11 and used for a clock of the QAM signal.
申请公布号 JPH08149177(A) 申请公布日期 1996.06.07
申请号 JP19940289792 申请日期 1994.11.24
申请人 SUMITOMO ELECTRIC IND LTD 发明人 NAKAMURA TERUHIRO
分类号 H04L27/38;H04L7/00 主分类号 H04L27/38
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