发明名称 SYNTHESIZER CIRCUIT
摘要 PURPOSE: To reduce the required capacity of a ROM, to reduce circuit scale and to reduce power consumption by providing three devices for respectively generating specified data, and providing the waveform data of a sine wave by adding the data of these three devices. CONSTITUTION: A bit inverter 2 is composed of an EX-OR step. The outputs of the bit inverter 2 are data corresponding to the phases from '0' toπ/2. With these data as inputs, the sine waveform data corresponding to the phases from '0' toπ/2 are separately generating, calculating following three data, data [1:M-1] are data to be linearly increased from the value of sine waveform data at the time of phase '0', data B (B[1:M-4]) are data of the 1/4 value of data A at the phases from '0' toπ/4, and data C (C[1:M-4]) are data for correction. These three kinds of amplitude data are added by a full adder 5 so that the half-wave rectified waveform of a sine wave can be provided.
申请公布号 JPH08130414(A) 申请公布日期 1996.05.21
申请号 JP19940268732 申请日期 1994.11.01
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 YAMAGISHI AKIHIRO;ISHIKAWA MASAYUKI
分类号 H03B28/00;(IPC1-7):H03B28/00 主分类号 H03B28/00
代理机构 代理人
主权项
地址