发明名称 SEMICONDUCTOR DEVICE ISOLATION METHOD
摘要 The isolation method for semiconductor memory devices includes the steps of forming a pad oxide layer(301) and first protection layer(302) on a substrate(100), etching portions of the first protection layer and pad oxide layer, placed on an isolation region, undercutting the pad oxide layer(301) to allow the pad oxide layer pattern to have wider width than the first protection layer(302), forming a bird's beak controlling oxide layer(303) on the isolation region including the undercut area, forming a second protection layer(304) in a space shape on the sides of the first protection layer pattern and pad oxide layer pattern, to reduce the width of the isolation region, forming a cap oxide layer(305) on the substrate, implanting ions into the isolation region, forming a field oxide layer(306) on the isolation region, wet-etching the field oxide layer, the first and second protection layers, forming a sacrifice oxide layer on the substrate, and wet-etching the sacrifice oxide layer, pad oxide layer and bird's beak controlling oxide layer.
申请公布号 KR960005044(B1) 申请公布日期 1996.04.18
申请号 KR19920007789 申请日期 1992.05.08
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, YUN - KI
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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