发明名称 System with multiple interface logic circuits including arbitration logic for individually linking multiple processing systems to at least one remote sub-system
摘要 A data processing and transmission network includes plural information processing systems and shared sub-systems remote from the information processing systems. Each shared sub-system includes an I/O bus and a plurality of I/O bus interface logic circuits coupled to the bus. Each interface logic circuit is coupled to one of the system processing devices via a bidirectional fiber optic link, and thereby couples its associated processing device to the I/O bus. Further fiber optic links couple each system processing device to the I/O bus of each remaining sub-system through an associated I/O bus interface logic circuit. Each sub-system further includes multiple I/O devices, each device coupled to a device controller which in turn is coupled to the I/O bus. The bus interface logic circuits and device controllers incorporate arbitration circuitry and communicate with one another via their associated I/O bus, thus to resolve contentions for control of the bus at the sub-system level rather than at the system processor level. These features provide a network with a high degree of redundancy, substantially reduced data access times, and flexibility in network configurations. Regardless of network size, each sub-system I/O device is equally available to all system processing devices, and each system processing device is transparent to the other system processors.
申请公布号 US5506964(A) 申请公布日期 1996.04.09
申请号 US19920869424 申请日期 1992.04.16
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BEUKEMA, BRUCE L.
分类号 G06F13/00;G06F11/00;G06F15/17;(IPC1-7):G06F13/368;G06F13/20 主分类号 G06F13/00
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