| 摘要 |
A phase-locked loop frequency synthesizer with adjustable frequency has blanking circuits to remove a predetermined number of pulses per second from a signal applied to an associated frequency divider. Each blanking circuit comprises a latch circuit operated by a signal of predetermined latch frequency to disable the associated frequency divider a number of times per second equal to the predetermined latch frequency. A counter circuit coupled to the latch circuit and adjustably set by an associated selector controls the latch circuit and enables the frequency divider said number of times per second after a predetermined number of pulses of a signal supplied to the frequency divider according to the setting of the associated selector. The number of pulses per second removed by the blanking circuit is thus controlled by the setting of the associated selector multiplied by the number of times per second the associated latch circuit is operated.
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