| 摘要 |
Carry-chain structures useful in circuits such as adders, subtractors, counters and arithmetic logic units (i.e., ALU's). The carry-chain structures have regular architectures that can be conveniently generated in various bit widths by automated compiler systems. In a preferred embodiment, a method for automatically generating a carry-chain circuit using a compiler which includes a library of cells by selecting a first cell from the library of cells for use as a carry propagation cell, and using the first cell for multiplexing a carry signal produced by the carry propagation cell, such that the carry-chain includes a plurality of first cells. Further, a carry-chain architecture is produced using the aforementioned method.
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