Current control circuit for esp. DRAM bit line read-out amplifier

摘要

The control circuit includes a bit line read-out amplifier (12), a data-bit clamping circuit, two current path circuits (14,16), and a current path controller (18). One current path (16) is provided with an NMOS transistor and the current path controller is provided with an NAND gate combination. The bit-line amplifier reads and amplifies data bits on a bit line, while the data bit clamping circuit supplies current to the amplifier. The initial current path circuit (14) forms a current path from the data bit holding circuit to the read-out amplifier during a refreshed operation. The NMOS containing current path circuit is between the initial current path circuit and the holding circuit. The latter circuit makes or breaks the current path. The current path controller generates a current path signal (Yi2) in dependence on an address signal, and feeds it to the second current path.