| 摘要 |
The compression and display of video signal are done at the same time by using an FIFO(first in first out) memory. The circuit includes a video signal processor(10) for processing video signal externally transmitted, a video memory(12) for storing the output signal of the video signal processor(10) by frame units, a D/A converter(13) for converting digital video signal to analog signal which is transmitted to a monitor, an FIFO memory(14) for storing video signal to be compressed, a memory controller(15) for controlling R/W action of the FIFO memory(14), and a data compressor(10) for compressing video data reproduced from the video memory(12).
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