Packaged semiconductor device having stress absorbing film

摘要

A packaged semiconductor device has a semiconductor chip and leads formed over the chip with an electrically insulating film interposed therebetween and a packaging material for sealing the chip and the inner lead portions of the leads. The electrically insulating film has such an area as to provide a peripheral portion not covered by parts of the inner lead portions of the leads for strengthening adherence of the electrically insulating film to the packaging material and to the chip. The electrically insulating film has a thickness substantially in a range from 80 mu m to 200 mu m for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature. A stress absorption film may be formed between the electrically insulating film and the semiconductor chip for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature.