Weighted summing circuit

摘要

A weighted summing circuit for minimizing bias voltage influence includes capacitive coupling and a closed loop inverter. The weighted summing circuit inputs the output of a capacitive coupling CP1 to serially connected first and second inverters INV1 and INV2, and includes grounded weighted capacitances C32 and C11, capacitance C21 connecting the first and the second inverters INV1 and INV2, and a capacitive coupling CP1 such that the closed loop gains of the first and second inverters INV1 and INV2 are substantially equal. The closed loop gains of the first and second inverters INV1 and INV2 are balanced.