| 摘要 |
PURPOSE:To reduce the cost of wiring work, etc., by a clock system wherein a serial time signal, e.g. IRIG-B, is superposed on a three-phase drive signal and delivered to a plurality of analog and digital slave clocks through a single transmission line. CONSTITUTION:A signal converting section 2 converts a time information delivered from a master clock 1 into a superposed signal of a three-phase driving signal and a serial time signal, e.g. IRIG-B, which is then transmitted, through a single transmission line 3, to each time/power supply separating section 4 and each drive signal separating section 6. The separating section 4 separates a three-phase drive signal and a series time signal, e.g. IRIG-B from the transmitted superposed signal. The separated three-phase drive signal is rectified and fed, as the power supply current, to a digital slave clock 5 along with the separated serial time signal thus indicating the time. The separating section 6 removes the serial time signal from the superposed signal to produce a three-phase drive signal which is fed to an analog slave clock 7. |
