发明名称 Logic gate with controllable hysteresis and high frequency voltage controlled oscillator
摘要 A hysteresis circuit comprises a first logic section, a second logic section cascaded with the first logic section, and circuitry for controlling hysteresis threshold voltages of the hysteresis circuit. The hysteresis controlling circuitry conducts current from a source of a first supply voltage to the output lead of the first logic section during a low-to-high transition of an input voltage on an input terminal of the hysteresis circuit. The hysteresis controlling circuitry conducts current from the output lead of the first logic section to a source of a second supply voltage during a high-to-low transition of the input voltage on the input terminal of the hysteresis circuit. A clock generator integrated circuit chip employing the hysteresis circuit in a voltage controlled oscillator can generate squarewave signals of 150 MHz onto a plurality of output terminals when powered from approximately 3.3 volts throughout a 0 to 70 degree Celsius temperature range, a clock skew of less than 0.5 nanosecond existing between the squarewave signals on the output terminals.
申请公布号 US5459437(A) 申请公布日期 1995.10.17
申请号 US19940241241 申请日期 1994.05.10
申请人 INTEGRATED DEVICE TECHNOLOGY 发明人 CAMPBELL, DAVID L.
分类号 H03K3/03;H03K3/3565;H03L7/099;H03L7/18;(IPC1-7):H03K3/03;H03K3/354 主分类号 H03K3/03
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