| 摘要 |
The present invention provides a sub-ranging analog-to-digital (A/D) converter with improved speed and power consumption characteristics relative to known sub-ranging converters. The sub-ranging A/D converter utilizes information relating to the values of the bits determined in one stage to define the range of operation for a subsequent stage. In one embodiment, the subsequent stage utilizes three-input comparators in determining the value of a bit. Two of the inputs are used to receive signals representative of the upper and lower limits of the range of operation that has been determined by the prior stage and the other input is used to receive the analog signal. The three-input comparator operates to produce an output signal that is indicative of the relationship of the analog signal to a threshold level within the defined range of operation determined by the prior stage.
|
