Bus interface circuit of integrated circuit and input/output buffer circuit.

摘要

The object of the present invention is to provide a bus interface circuit which can suppress generation of noise. Between an internal data bus (32b) and an external data bus (8b), an AND gate (12b) and output buffer (12c) are connected in parallel with an input buffer (12a). A control signal a is supplied to a control terminal of the output buffer (12c) and an inverted signal of the control signal a is supplied to a control terminal of the input buffer (12a). A control signal b is supplied to one input terminal of the AND gate (12b). When no access request is made to an external RAM and external ROM, CPU (33) enables the control signals a and b to be output as a high-level and a low-level signals, respectively. At that time, a respective output buffer (12c) is allowed to have corresponding data to pass through, but data on the internal data bus (32b) is not output to the external data bus (8b) because the AND gate (12b) is placed in closed state. <IMAGE>