发明名称 Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process
摘要 Herein disclosed is an exposure technology for a semiconductor integrated circuit device which has a pattern as fine as that of an exposure wavelength. The technology contemplates to improve the resolution characteristics of the pattern by making use of the mutual interference of exposure luminous fluxes.
申请公布号 US5455144(A) 申请公布日期 1995.10.03
申请号 US19940219726 申请日期 1994.03.29
申请人 HITACHI, LTD. 发明人 OKAMOTO, YOSHIHIKO;MORIUCHI, NOBORU
分类号 G03F1/00;G03F1/14;G03F7/20;G03F9/00;H01L21/8239;H01L27/105;(IPC1-7):G03F7/00 主分类号 G03F1/00
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