发明名称 WIRELESS ARITHMETIC AND LOGIC UNIT
摘要 PURPOSE:To reduce a wiring capacity to be a stray capacity to a tunnel joining capacity by arranging plural conductive materials connected by a single electron tunnel phenomenon at a prescribed position. CONSTITUTION:A logic circuit 101 divides the surface of the two-dimensional plane of a substrate executing element arrangement into plural equilateral hexagons 102 and arranges the conductive materials 105 at the vertexes 110 of the respective equilateral hexagons 102 so that the vertexes 110 and the center of a circle of the bottom of the conductive materials 105 in the shape of a cylinder are coincident. When two conductive materials 105 are arranged on the same side 111 on one equilateral hexagon 102, the two adjacent conductive materials 105 are combined by the single electron tunnel phenomenon by way of a fine interval and in another case, the combination between the conductive materials 105 by the tunnel phenomenon is not generated. The existence of combination by the single electron tunnel enables a signal, namely one electron, to be propagated between the conductive materials 105 without wiring. This reduces the wiring capacity to be the stray capacity to the tunnel joining capacity.
申请公布号 JPH07234776(A) 申请公布日期 1995.09.05
申请号 JP19940027710 申请日期 1994.02.25
申请人 HITACHI LTD 发明人 KANBARA SHIRO;PIITAA RII;MATSUO HITOSHI
分类号 H01L29/423;G06F7/48;H01L29/06;H01L29/41;H01L29/66;(IPC1-7):G06F7/48 主分类号 H01L29/423
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