DRAM with cell matrix of transistors

摘要

In the cell matrix section of the semiconductor substrate (100) is formed a first transistor which a second transistor is incorporated in the peripheral circuit. The surface of the resulting structure is covered by an insulating layer with contact holes, exposing the transistor gate electrodes (104,104'). There are two metal pattern layers on the insulating layer, one coupled to the first transistor gate electrode and the second one to the second transistor gate, source and drain electrodes via the contact holes. The structure is covered by a second insulating layer, over which is formed a capacitor with a storage electrode (115), an intermediate dielectric (116), and a plate electrode (117). The assembly is covered by a third insulating layer (118) with contacting through holes (119).