发明名称 |
Semiconductor memory device having redundancy memory cells shared among memory blocks |
摘要 |
An improved SRAM is disclosed including a plurality of memory blocks each having a redundancy memory cell to be shared. In redundancy row decoders 50a, 50b, 50c provided in each memory block, a memory block to be remedied is programmed. Accordingly, a redundancy memory cell row corresponding to each redundancy row decoder can be used for remedy of a defect memory cell in another memory block. Since a defect memory cell may be remedied flexibly, the yield rate in production of semiconductor memories is improved.
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申请公布号 |
US5446692(A) |
申请公布日期 |
1995.08.29 |
申请号 |
US19930008109 |
申请日期 |
1993.01.25 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
HARAGUCHI, YOSHIYUKI;FUJITA, KOREAKI;AKAI, KIYOYASU |
分类号 |
G11C11/401;G11C29/00;G11C29/04;(IPC1-7):G11C13/00 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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