| 摘要 |
PURPOSE:To make a high-density integration possible with reducing power consumption and reducing the number of wirings considerably by using the first 1/2- frequency division circuit and the second 1/2-frequency division circuit in the first stage or first several stages and in the succeeding stages respectively. CONSTITUTION:The first 1/2-frequency division circuit is constituted by gates G21, G22, G23 and G23, and clock pulse CP and inversion CP which have a phase opposite to each other are inputted to gates, and this circuit is operated by the approximately half power consumption of the same kind of circuit. Meanwhile, the second 1/2-frequency division circuit is constituted by gates G31, G32, G33 and G34, and the number of wirings is reduced considerably. As a result, power consumption can be reduced, and a high-density integration of devices is possible. |
