| 摘要 |
An integrated circuit for generating a reset signal includes a circuit part having two first transistors being connected in series between terminals for a first and a second supply potential and each having a respective one of first and second mutually complementary channel types. A serial network acting as a voltage divider circuit is connected between the terminals for the first and the second supply potentials. The serial network includes at least two second transistors each having a respective one of the mutually complementary channel types and at least one element having a voltage drop during operation. The sources of the transistors of the first channel type are connected to the terminal for the first supply potential. The sources of the transistors of the second channel type are connected to the terminal for the second supply potential. The drains of the two first transistors form a first circuit node at which a reset signal is created in operation. The gate of the second transistor of the second channel type is connected to the first circuit node. The gates of the first and second transistors of the first channel type both are connected to the drain of the second transistor of the first channel type of the serial network, forming a second circuit node. The gate of the first transistor of the second channel type is connected to the second circuit node.
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